This book is the sequel to nano cmos circuit and physical design taking design to technology nodes beyond 65nm geometries throughout the book real world examples simplify complex concepts helping readers see how they can successfully handle projects on nano cmos nodes. This book is the sequel to nano cmos circuit and physical design taking design to technology nodes beyond 65nm geometries it is divided into three parts part one newly exacerbated effects introduces the newly exacerbated effects that require designers attention beginning with a discussion of the lithography aspects of dfm followed by the impact of layout on transistor performance. This book is the sequel to nano cmos circuit and physical design taking design to technology nodes beyond 65nm geometries it is divided into three parts part one newly exacerbated effects introduces the newly exacerbated effects that require designers attention beginning with a discussion of the lithography aspects of dfm followed by the impact of layout on transistor performance. This video is unavailable watch queue queue watch queue queue. Nano cmos design for manufacturability robust circuit and physical design for sub 65nm technology nodes wong ban p mittal anurag starr greg w zach franz moroz victor kahng andrew 9780470112809 amazoncom books